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    SubjectRe: [PATCH] x86: use PCI method for enabling AMD extended config space before MSR method
    On 06.01.11 11:57:35, Jan Beulich wrote:
    > While both methods should work equivalently well for the native case,
    > the Xen Dom0 case can't reliably work with the MSR one, since there's
    > no guarantee that the virtual CPUs it has available fully cover all
    > necessary physical ones.
    >
    > As per the suggestion of Robert Richter the patch only adds the PCI
    > method, but leaves the MSR one as a fallback to cover new systems the
    > PCI IDs of which may not have got added to the code base yet.
    >
    > Signed-off-by: Jan Beulich <jbeulich@novell.com>
    > Cc: Robert Richter <robert.richter@amd.com>
    > Cc: Joerg Roedel <Joerg.Roedel@amd.com>
    > Cc: Andreas Herrmann <Andreas.Herrmann3@amd.com>
    > Cc: Jeremy Fitzhardinge <jeremy@goop.org>
    >
    > ---
    > arch/x86/include/asm/amd_nb.h | 7 ++++++
    > arch/x86/kernel/amd_nb.c | 7 ++++++
    > arch/x86/kernel/aperture_64.c | 44 +++++++++++++++---------------------------
    > arch/x86/pci/amd_bus.c | 30 ++++++++++++++++++++++++++++
    > 4 files changed, 60 insertions(+), 28 deletions(-)

    > --- 2.6.37/arch/x86/pci/amd_bus.c
    > +++ 2.6.37-x86-amd-ecs/arch/x86/pci/amd_bus.c
    > @@ -4,6 +4,7 @@
    > #include <linux/cpu.h>
    > #include <linux/range.h>
    >
    > +#include <asm/amd_nb.h>
    > #include <asm/pci_x86.h>
    >
    > #include <asm/pci-direct.h>
    > @@ -386,6 +387,35 @@ static int __init pci_io_ecs_init(void)
    > if (boot_cpu_data.x86 < 0x10)
    > return 0;
    >
    > +#ifdef CONFIG_AMD_NB
    > + /* Try the PCI method first. */
    > + if (early_pci_allowed()) {
    > + unsigned int i, n;
    > +
    > + for (n = i = 0; !n && amd_bus_dev_ranges[i].dev_limit; ++i) {
    > + u8 bus = amd_bus_dev_ranges[i].bus;
    > + u8 slot = amd_bus_dev_ranges[i].dev_base;
    > + u8 limit = amd_bus_dev_ranges[i].dev_limit;
    > +
    > + for (; slot < limit; ++slot) {
    > + u32 val = read_pci_config(bus, slot, 3, 0);
    > +
    > + if (!early_is_k8_nb(val))
    > + continue;
    > +
    > + val = read_pci_config(bus, slot, 3, 0x8c);
    > + if (!(val & (ENABLE_CF8_EXT_CFG >> 32))) {
    > + val |= ENABLE_CF8_EXT_CFG >> 32;
    > + write_pci_config(bus, slot, 3, 0x8c,
    > + val);
    > + }
    > + ++n;
    > + }
    > + }
    > + pr_info("Extended Config Space enabled on %u nodes\n", n);

    Isn't i the number of nodes?

    Otherwise the patch looks good.

    -Robert

    Acked-by: Robert Richter <robert.richter@amd.com>

    > + }
    > +#endif
    > +
    > register_cpu_notifier(&amd_cpu_notifier);
    > for_each_online_cpu(cpu)
    > amd_cpu_notify(&amd_cpu_notifier, (unsigned long)CPU_ONLINE,
    >
    >
    >

    --
    Advanced Micro Devices, Inc.
    Operating System Research Center



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