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    Subject[PATCH 2/4] x86, amd: Enable L3 cache index disable on family 0x15
    Date
    AMD family 0x15 CPUs support L3 cache index disable, so enable it on
    them.

    Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com>
    ---
    arch/x86/kernel/amd_nb.c | 3 +++
    1 files changed, 3 insertions(+), 0 deletions(-)

    diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
    index 0a99f71..a4f394c 100644
    --- a/arch/x86/kernel/amd_nb.c
    +++ b/arch/x86/kernel/amd_nb.c
    @@ -85,6 +85,9 @@ int amd_cache_northbridges(void)
    boot_cpu_data.x86_mask >= 0x1))
    amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;

    + if (boot_cpu_data.x86 == 0x15)
    + amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;
    +
    return 0;
    }
    EXPORT_SYMBOL_GPL(amd_cache_northbridges);
    --
    1.5.6.5



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