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    SubjectRe: [tip:perf/urgent] perf, x86: Catch spurious interrupts after disabling counters
    On 29.09.10 11:33:07, Stephane Eranian wrote:
    > There is something else bothering me with cpuc->running.
    > It is not reset outside of the interrupt handler. So what if
    > event scheduling shuffles things around and an event is
    > moved somewhere else. Don't you need to clear the
    > cpuc->running[idx] for the old counter index?

    We can clear it only in the NMI handler, because the next NMI after
    stopping a counter must mark the counter as handled. This may cause
    some false positives, but it is the best we can get.


    Advanced Micro Devices, Inc.
    Operating System Research Center

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