Messages in this thread | | | Date | Wed, 29 Sep 2010 19:45:28 +0400 | From | Cyrill Gorcunov <> | Subject | Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after disabling counters |
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On Wed, Sep 29, 2010 at 05:33:07PM +0200, Stephane Eranian wrote: > Robert, > > There is something else bothering me with cpuc->running. > > It is not reset outside of the interrupt handler. So what if > event scheduling shuffles things around and an event is > moved somewhere else. Don't you need to clear the > cpuc->running[idx] for the old counter index? > >
Both bitmasks are set and test with same index though it might be a bit obscure scheme (we could be clearing this bit in x86_pmu_stop but it just a wasting cycles).
Btw, since x86 architectural and p4 are using same tests for running I presume better to have some helper rather then open coded pile?
Cyrill
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