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    SubjectRe: [tip:perf/urgent] perf, x86: Catch spurious interrupts after disabling counters
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    On Wed, Sep 29, 2010 at 3:13 PM, Stephane Eranian <eranian@google.com> wrote:
    > On Wed, Sep 29, 2010 at 2:54 PM, Robert Richter <robert.richter@amd.com> wrote:
    >> On 29.09.10 14:53:01, Robert Richter wrote:
    >>> Stephane,
    >>>
    >>> On 29.09.10 08:26:41, Stephane Eranian wrote:
    >>> > You've applied the fix only to the generic X86 interrupt handler
    >>> > which is currently used by AMD64 processors.
    >>>
    >>> (... and P4).
    >>>
    Well, in tip-x86, I don't see your fix in p4_pmu_handle_irq(). Is
    that pending?


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