Messages in this thread Patch in this message | | | From | Nikhil Rao <> | Subject | [PATCH 6/6] sched: enable SD_IDLE_LOAD_BALANCE on MC, CPU and NUMA (x86) domains | Date | Thu, 29 Jul 2010 22:19:06 -0700 |
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Enable SD_IDLE_LOAD_BALANCE on MC, CPU and NUMA for x86. This sched flag enables the idle load balancer on these scheduling domains.
Signed-off-by: Nikhil Rao <ncrao@google.com> --- arch/x86/include/asm/topology.h | 2 +- include/linux/topology.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index 9f29b4e..8b27b3f 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -150,7 +150,7 @@ extern unsigned long node_remap_size[]; | 0*SD_SHARE_PKG_RESOURCES \ | 1*SD_SERIALIZE \ | 0*SD_PREFER_SIBLING \ - | 0*SD_IDLE_LOAD_BALANCE \ + | 1*SD_IDLE_LOAD_BALANCE \ , \ .last_balance = jiffies, \ .balance_interval = 1, \ diff --git a/include/linux/topology.h b/include/linux/topology.h index 97fbb1b..cef87aa 100644 --- a/include/linux/topology.h +++ b/include/linux/topology.h @@ -135,7 +135,7 @@ int arch_update_cpu_topology(void); | 0*SD_SHARE_CPUPOWER \ | 1*SD_SHARE_PKG_RESOURCES \ | 0*SD_SERIALIZE \ - | 0*SD_IDLE_LOAD_BALANCE \ + | 1*SD_IDLE_LOAD_BALANCE \ | sd_balance_for_mc_power() \ | sd_power_saving_flags() \ , \ @@ -169,7 +169,7 @@ int arch_update_cpu_topology(void); | 0*SD_SHARE_CPUPOWER \ | 0*SD_SHARE_PKG_RESOURCES \ | 0*SD_SERIALIZE \ - | 0*SD_IDLE_LOAD_BALANCE \ + | 1*SD_IDLE_LOAD_BALANCE \ | sd_balance_for_package_power() \ | sd_power_saving_flags() \ , \ -- 1.7.1
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