Messages in this thread |  | | | Date | Tue, 1 Jun 2010 09:46:17 +0800 | | Subject | Re: [dm-devel] [PATCH] DM-CRYPT: Scale to multiple CPUs | | From | huang ying <> |
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On Tue, Jun 1, 2010 at 6:07 AM, Herbert Xu <herbert@gondor.apana.org.au> wrote: > On Mon, May 31, 2010 at 09:04:00PM +0200, Andi Kleen wrote: >> > I mean how it is implemented now in crypto API, and I was almost >> > sure that aes-ni acceleration code uses cryptd (iow real asynchronous processing) >> > and also that not all CPU cores can run these instruction in parallel. >> >> I think you can configure it to use cryptd (or pcrypt), but it's not default >> and usually higher overhead. > > Right. The only reason aes-ni uses the async interface is to > work around the fact that you have to save FPU state when using > it. For dm-crypt you can consider it to be synchronous.
The reason for aes-ni to use async interface is that the FPU/SSE instructions enclosed by kernel_fpu_begin and kernel_fpu_end is not reentranceable. That is, it is not safe to use FPU/SSE instructions in interrupt context, if the instructions are used in interrupted context. So irq_fpu_usable is used in the async interface of aes-ni, and go asynchronous implementation only if !irq_fpu_usable. In most instances, the async interface of aes-ni will run in synchronous mode.
Best Regards, Huang Ying -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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