Messages in this thread |  | | | Date | Mon, 24 May 2010 11:13:09 -0700 (PDT) | | From | Dan Magenheimer <> | | Subject | RE: [PATCH] x86: Export tsc related information in sysfs |
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> From: john stultz [mailto:johnstul@us.ibm.com] > > Yea, the relative instability of the tsc calibration at boot is an > issue for folks who want very very precise timekeeping immediately > after a reboot. > > I proposed a solution to this awhile back via a boot option users > could use to specify the tsc_khz freq, so it would be consistent from > boot to boot. See: https://patchwork.kernel.org/patch/22492/ > > It didn't really go anywhere due to a lack of public interest. > However, if you're interested in playing with it, I can try to revive > the patch.
Another possibility: Optionally trust the stamped rate for the part?
I understand that on Nehalem this value is available in MSR_PLATFORM_INFO[15:8] (google for MSR_PLATFORM_INFO 15 8), but I don't know if this MSR is available on older (or AMD) processors.
Just wondering: If one were to put an ultra-precise scope on a processor, how far off would the calibrated value be? I'd imagine the process of calibrating one unknown crystal against a second crystal which has a known-but-not-highly-precise frequency, though good enough for most purposes, is not particularly accurate. In other words, maybe the stamped rate is more accurate than the calibrated rate anyway?
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