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    Subject[PATCH 4/9] tsc, x86: use new perfctr reservation functions in tsc code
    Date
    Use reserve_perfctr()/release_perfctr() in tsc code.

    Cc: Thomas Gleixner <tglx@linutronix.de>
    Signed-off-by: Robert Richter <robert.richter@amd.com>
    ---
    arch/x86/kernel/tsc.c | 6 ++----
    1 files changed, 2 insertions(+), 4 deletions(-)

    diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
    index ff98ef2..2cdacae 100644
    --- a/arch/x86/kernel/tsc.c
    +++ b/arch/x86/kernel/tsc.c
    @@ -871,7 +871,7 @@ static unsigned long __init calibrate_cpu(void)
    unsigned long flags;

    for (i = 0; i < 4; i++)
    - if (avail_to_resrv_perfctr_nmi_bit(i))
    + if (reserve_perfctr(i))
    break;
    no_ctr_free = (i == 4);
    if (no_ctr_free) {
    @@ -881,8 +881,6 @@ static unsigned long __init calibrate_cpu(void)
    rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
    wrmsrl(MSR_K7_EVNTSEL3, 0);
    rdmsrl(MSR_K7_PERFCTR3, pmc3);
    - } else {
    - reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
    }
    local_irq_save(flags);
    /* start measuring cycles, incrementing from 0 */
    @@ -900,7 +898,7 @@ static unsigned long __init calibrate_cpu(void)
    wrmsrl(MSR_K7_PERFCTR3, pmc3);
    wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
    } else {
    - release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
    + release_perfctr(i);
    }

    return pmc_now * tsc_khz / (tsc_now - tsc_start);
    --
    1.7.0



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