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    SubjectRe: [PATCH 0/3] perf/core, x86: unify perfctr bitmasks
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    On Tue, Mar 30, 2010 at 5:11 PM, Cyrill Gorcunov <gorcunov@gmail.com> wrote:
    > On Tue, Mar 30, 2010 at 05:00:55PM +0200, Peter Zijlstra wrote:
    >> On Tue, 2010-03-30 at 15:53 +0200, Stephane Eranian wrote:
    >> > > So, there are some ARCH_PERFMON_EVENTSEL_* masks that are Intel only,
    >> > > which is true for ARCH_PERFMON_EVENTSEL_ANY. And indead, the code
    >> > > should be checked for this. ARCH_PERFMON_EVENTSEL_ANY is always
    >> > > cleared on AMD cpus, so this code is ok. Actually the bit is cleared
    >> >
    >> > Until AMD uses that bit too and you won't notice this test. This is a security
    >> > check specific to Intel and it should be in an Intel-specific function.
    >> >
    >> > > for *all* cpus in x86_pmu_raw_event(), the code was and is broken for
    >> > > this.
    >> > >
    >> > Yes, needs to be authorized for any perfmon v3 and later revisions.
    >>
    >> So how about something like this on top of Robert's patches?
    >>
    > [...]
    >
    > Looks good for me! Thanks Peter!
    >
    Looks better. Thanks.

    Acked-by: Stephane Eranian <eranian@google.com>


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