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    Subject[PATCH 08/18] KVM: MMU: Change init_kvm_softmmu to take a context as parameter
    Date
    Some logic of this function is required to build the Nested
    Nested Paging context. So factor the required logic into a
    seperate function and export it.
    Also make the whole init path suitable for more than one mmu
    context.

    Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
    ---
    arch/x86/kvm/mmu.c | 60 ++++++++++++++++++++++++++++++---------------------
    arch/x86/kvm/mmu.h | 1 +
    2 files changed, 36 insertions(+), 25 deletions(-)

    diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
    index 8f835f1..560ecb6 100644
    --- a/arch/x86/kvm/mmu.c
    +++ b/arch/x86/kvm/mmu.c
    @@ -2225,10 +2225,9 @@ static void nonpaging_free(struct kvm_vcpu *vcpu)
    mmu_free_roots(vcpu);
    }

    -static int nonpaging_init_context(struct kvm_vcpu *vcpu)
    +static int nonpaging_init_context(struct kvm_vcpu *vcpu,
    + struct kvm_mmu *context)
    {
    - struct kvm_mmu *context = &vcpu->arch.mmu;
    -
    context->new_cr3 = nonpaging_new_cr3;
    context->page_fault = nonpaging_page_fault;
    context->gva_to_gpa = nonpaging_gva_to_gpa;
    @@ -2287,9 +2286,10 @@ static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
    #include "paging_tmpl.h"
    #undef PTTYPE

    -static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
    +static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
    + struct kvm_mmu *context,
    + int level)
    {
    - struct kvm_mmu *context = &vcpu->arch.mmu;
    int maxphyaddr = cpuid_maxphyaddr(vcpu);
    u64 exb_bit_rsvd = 0;

    @@ -2342,9 +2342,11 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
    }
    }

    -static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
    +static int paging64_init_context_common(struct kvm_vcpu *vcpu,
    + struct kvm_mmu *context,
    + int level)
    {
    - struct kvm_mmu *context = &vcpu->arch.mmu;
    + reset_rsvds_bits_mask(vcpu, context, level);

    ASSERT(is_pae(vcpu));
    context->new_cr3 = paging_new_cr3;
    @@ -2360,17 +2362,17 @@ static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
    return 0;
    }

    -static int paging64_init_context(struct kvm_vcpu *vcpu)
    +static int paging64_init_context(struct kvm_vcpu *vcpu,
    + struct kvm_mmu *context)
    {
    - reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
    - return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
    + return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
    }

    -static int paging32_init_context(struct kvm_vcpu *vcpu)
    +static int paging32_init_context(struct kvm_vcpu *vcpu,
    + struct kvm_mmu *context)
    {
    - struct kvm_mmu *context = &vcpu->arch.mmu;
    + reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);

    - reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
    context->new_cr3 = paging_new_cr3;
    context->page_fault = paging32_page_fault;
    context->gva_to_gpa = paging32_gva_to_gpa;
    @@ -2384,10 +2386,10 @@ static int paging32_init_context(struct kvm_vcpu *vcpu)
    return 0;
    }

    -static int paging32E_init_context(struct kvm_vcpu *vcpu)
    +static int paging32E_init_context(struct kvm_vcpu *vcpu,
    + struct kvm_mmu *context)
    {
    - reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
    - return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
    + return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
    }

    static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
    @@ -2410,15 +2412,15 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
    context->gva_to_gpa = nonpaging_gva_to_gpa;
    context->root_level = 0;
    } else if (is_long_mode(vcpu)) {
    - reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
    + reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
    context->gva_to_gpa = paging64_gva_to_gpa;
    context->root_level = PT64_ROOT_LEVEL;
    } else if (is_pae(vcpu)) {
    - reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
    + reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
    context->gva_to_gpa = paging64_gva_to_gpa;
    context->root_level = PT32E_ROOT_LEVEL;
    } else {
    - reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
    + reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
    context->gva_to_gpa = paging32_gva_to_gpa;
    context->root_level = PT32_ROOT_LEVEL;
    }
    @@ -2426,24 +2428,32 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
    return 0;
    }

    -static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
    +int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
    {
    int r;
    -
    ASSERT(vcpu);
    ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));

    if (!is_paging(vcpu))
    - r = nonpaging_init_context(vcpu);
    + r = nonpaging_init_context(vcpu, context);
    else if (is_long_mode(vcpu))
    - r = paging64_init_context(vcpu);
    + r = paging64_init_context(vcpu, context);
    else if (is_pae(vcpu))
    - r = paging32E_init_context(vcpu);
    + r = paging32E_init_context(vcpu, context);
    else
    - r = paging32_init_context(vcpu);
    + r = paging32_init_context(vcpu, context);

    vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
    vcpu->arch.mmu.tdp_enabled = false;
    +
    + return r;
    +}
    +EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
    +
    +static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
    +{
    + int r = kvm_init_shadow_mmu(vcpu, &vcpu->arch.mmu);
    +
    vcpu->arch.mmu.set_cr3 = kvm_x86_ops->set_cr3;
    vcpu->arch.mmu.get_cr3 = get_cr3;
    vcpu->arch.mmu.inject_page_fault = kvm_inject_page_fault;
    diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
    index be66759..64f619b 100644
    --- a/arch/x86/kvm/mmu.h
    +++ b/arch/x86/kvm/mmu.h
    @@ -49,6 +49,7 @@
    #define PFERR_FETCH_MASK (1U << 4)

    int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
    +int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context);

    static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
    {
    --
    1.7.0



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