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    SubjectRe: [PATCH] perf, x86: Add Nehelem PMU programming errata workaround
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    On Sat, Mar 27, 2010 at 10:27 PM, Andi Kleen <andi@firstfloor.org> wrote:
    > Peter Zijlstra <peterz@infradead.org> writes:
    >
    >> Subject: perf, x86: Add Nehelem PMU programming errata workaround
    >> From: Peter Zijlstra <a.p.zijlstra@chello.nl>
    >> Date: Fri Mar 26 13:59:41 CET 2010
    >>
    >> Implement the workaround for Intel Errata AAK100 and AAP53.
    >>
    >> Also, remove the Core-i7 name for Nehalem events since there are also
    >> Westmere based i7 chips.
    >
    > Did you actually see this happen?
    >
    This is the same as AAJ91. At the time, I created a test program and it was
    moderately easy to reproduce.

    > It looks like this will make the context switch into a perf
    > enabled process _MUCH_ more expensive, MSR writes are very slow.
    >
    Yes, but there is no alternative, I suspect.


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