Messages in this thread | | | Date | Thu, 18 Feb 2010 11:11:56 +0100 | From | Andi Kleen <> | Subject | Re: [PATCH 09/10] x86-32: use SSE for atomic64_read/set if available |
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On Thu, Feb 18, 2010 at 10:53:06AM +0100, Luca Barbieri wrote: > > You seem to have forgotten to add benchmark results that show this is > > actually worth while? And is there really any user on 32bit > > that needs 64bit atomic_t? > perf is currently the main user. > On Core2, lock cmpxchg8b takes about 24 cycles and writes the > cacheline, while movlps takes 1 cycle. > clts/stts probably wipes out the savings if we need to use it, but we > can keep TS off and restore it lazily on return to userspace.
s/probably/very likely/
CR changes are slow and synchronize the CPU. The later is always slow.
It sounds like you didn't time it?
> > I'm also suspicious of your use of global register variables. > > This means they won't be saved on entry/exit of the functions. > > Does that really work? > I think it does. > The functions never change the global register variables, and thus > they are preserved.
Sounds fragile.
It'll generate worse code because gcc can't use these registers at all in the C code. Some gcc versions also tend to give up when they run out of registers too badly.
> Calls are done in inline assembly, which saves the variables if they > are actually used as parameters (the global register variables are > only visible in a portion of the C file, of course).
So why don't you simply use normal asm inputs/outputs?
-Andi
-- ak@linux.intel.com -- Speaking for myself only.
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