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    SubjectRe: USB mass storage and ARM cache coherency
    On Wed, 2010-02-17 at 15:27 +0000, Catalin Marinas wrote:
    > We do the same on ARM. The problem with most (all) HCD drivers that do
    > PIO is that they copy the data to the transfer buffer but there is no
    > call in this driver to flush_dcache_page(). The upper mass storage or
    > filesystem layers don't call this function either, so there isn't
    > anything that would set the PG_arch1 bit.

    Actually, clear it :-)

    I suppose that's one thing that needs to be fixed in the drivers.


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