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SubjectRe: [patch 2/3] scheduler: add full memory barriers upon task switch at runqueue lock/unlock


On Mon, 1 Feb 2010, Mathieu Desnoyers wrote:
>
> However, this does not deal with mm_cpumask update, and we cannot use
> the per-cpu rq lock, as it's a process-wide data structure updated with
> clear_bit/set_bit in switch_mm(). So at the very least, we would have to
> add memory barriers in switch_mm() on some architectures to deal with
> this.

I'd much rather have a "switch_mm()" is a guaranteed memory barrier logic,
because quite frankly, I don't see how it ever couldn't be one anyway. It
fundamentally needs to do at least a TLB context switch (which may be just
switching an ASI around, not flushing the whole TLB, of course), and I bet
that for 99% of all architectures, that is already pretty much guaranteed
to be equivalent to a memory barrier.

It certainly is for x86. "mov to cr0" is serializing (setting any control
register except cr8 is serializing). And I strongly suspect other
architectures will be too.

Btw, one reason to strongly prefer "switch_mm()" over any random context
switch is that at least it won't affect inter-thread (kernel or user-land)
switching, including switching to/from the idle thread.

So I'd be _much_ more open to a "let's guarantee that 'switch_mm()' always
implies a memory barrier" model than to playing clever games with
spinlocks.

Linus


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