Messages in this thread |  | | | Subject | Re: [PATCH RESEND percpu#for-next] percpu: align percpu readmostly subsection to cacheline | | From | Shaohua Li <> | | Date | Tue, 28 Dec 2010 08:48:21 +0800 |
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On Mon, 2010-12-27 at 21:37 +0800, Tejun Heo wrote: > Currently percpu readmostly subsection may share cachelines with other > percpu subsections which may result in unnecessary cacheline bounce > and performance degradation. > > This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() > linker macros, makes each arch linker scripts specify its cacheline > size and use it to align percpu subsections. > > This is based on Shaohua's x86 only patch. > > Signed-off-by: Tejun Heo <tj@kernel.org> > Cc: Shaohua Li <shaohua.li@intel.com> > --- > Shaohua, can you please verify this achieves the same result? If no > one objects, I'll route it through the percpu tree. yes, the x86 part works.
Thanks, Shaohua
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