Messages in this thread | | | Subject | Re: [PATCH 1/8] Staging: vme_ca91cx42: fix compiler warning on 64-bit build | From | Namhyung Kim <> | Date | Mon, 13 Dec 2010 23:16:08 +0900 |
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2010-12-13 (월), 14:50 +0100, Jiri Slaby: > On 12/13/2010 02:16 PM, Namhyung Kim wrote: > > @@ -867,13 +869,13 @@ ssize_t ca91cx42_master_read(struct vme_master_resource *image, void *buf, > > * maximal configured data cycle is used and splits it > > * automatically for non-aligned addresses. > > */ > > - if ((int)addr & 0x1) { > > + if (check_aligned(addr, 0x1)) { > > *(u8 *)buf = ioread8(addr); > > done += 1; > > if (done == count) > > goto out; > > } > > - if ((int)addr & 0x2) { > > + if (check_aligned(addr, 0x2)) { > > It should be IS_ALIGNED(addr, 2) and IS_ALIGNED(addr, 4) respectively > anyway... >
That's what I was looking for, thanks. :)
> > @@ -980,7 +982,7 @@ unsigned int ca91cx42_master_rmw(struct vme_master_resource *image, > > /* Lock image */ > > spin_lock(&(image->lock)); > > > > - pci_addr = (u32)image->kern_base + offset; > > + pci_addr = (u32)(unsigned long)image->kern_base + offset; > > No, do not hide bugs here. I see no reason why address returned from > ioremap couldn't be larger than 32 bits. Actually it is always on 64bit. > > Actually what this code tries to do? Shouldn't it be physical address of > the PCI resource instead? > > regards,
Sounds reasonable.
-- Regards, Namhyung Kim
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