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    SubjectRe: [PATCH 3/4] perf-events: Add support for supplementary event registers v3
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    On Wed, 2010-12-01 at 15:27 +0100, Peter Zijlstra wrote:
    > On Thu, 2010-11-18 at 11:47 +0100, Andi Kleen wrote:
    > > @@ -876,6 +944,8 @@ static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
    > > u64 enable_mask)
    > > {
    > > wrmsrl(hwc->config_base + hwc->idx, hwc->config | enable_mask);
    > > + if (hwc->extra_reg)
    > > + wrmsrl(hwc->extra_reg, hwc->extra_config);
    > > }
    >
    > I thought we agreed it made more sense to program the extra msr before
    > enabling the counter.

    Ah sorry, I seem to have mixed up the various versions.

    The latest does indeed do as we agreed. Sorry for the noise.


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