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Subject[PATCH UPDATED#2 04/16] x86: Use local variable to cache smp_processor_id() in setup_local_APIC()
This is a trivial clean up.

* Move initialization of @cpu inside preemption disabled region as
suggested by Cyrill Gorcunov.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
---
Alright, updated yet again, but I frankly don't see the point in these
changes. If setup_local_APIC() is being run from a different CPU, we
have a much larger problem. We're already accessing cpu local
resources (tsc, lapic) outside of preemption disabled area. But,
anyways, I don't think it matters one way or the other.
Thanks.

arch/x86/kernel/apic/apic.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
Index: work/arch/x86/kernel/apic/apic.c
===================================================================
--- work.orig/arch/x86/kernel/apic/apic.c
+++ work/arch/x86/kernel/apic/apic.c
@@ -1202,7 +1202,7 @@ static void __cpuinit lapic_setup_esr(vo
void __cpuinit setup_local_APIC(void)
{
unsigned int value, queued;
- int i, j, acked = 0;
+ int cpu, i, j, acked = 0;
unsigned long long tsc = 0, ntsc;
long long max_loops = cpu_khz;

@@ -1226,6 +1226,7 @@ void __cpuinit setup_local_APIC(void)
perf_events_lapic_init();

preempt_disable();
+ cpu = smp_processor_id();

/*
* Double-check whether this APIC is really registered.
@@ -1342,21 +1343,19 @@ void __cpuinit setup_local_APIC(void)
* TODO: set up through-local-APIC from through-I/O-APIC? --macro
*/
value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
- if (!smp_processor_id() && (pic_mode || !value)) {
+ if (!cpu && (pic_mode || !value)) {
value = APIC_DM_EXTINT;
- apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
- smp_processor_id());
+ apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu);
} else {
value = APIC_DM_EXTINT | APIC_LVT_MASKED;
- apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n",
- smp_processor_id());
+ apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu);
}
apic_write(APIC_LVT0, value);

/*
* only the BP should see the LINT1 NMI signal, obviously.
*/
- if (!smp_processor_id())
+ if (!cpu)
value = APIC_DM_NMI;
else
value = APIC_DM_NMI | APIC_LVT_MASKED;

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