Messages in this thread Patch in this message | | | From | Stephen Boyd <> | Subject | [PATCH 2/2] arm: add optimized inlining | Date | Wed, 24 Nov 2010 15:57:00 -0800 |
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This patch is inspired by 60a3cdd (x86: add optimized inlining, 2008-03-03). GCC is currently being forced to inline whatever functions are marked as inline (due to the #define of inline to the gcc attribute always_inline). The 4.x series of GCC has a rewritten inlining algorithm which should be good enough for the kernel's purposes. Enabling this option will allow GCC to decide when to inline a function marked as inline. Since it's opt-in and doesn't affect functions marked as always_inline there shouldn't be much harm in allowing people to enable this. If there is, we should find the affected functions and mark them as always_inline.
text data bss dec hex filename 5987182 246104 926696 7159982 6d40ae vmlinux.orig 5794190 246104 926744 6967038 6a4efe vmlinux.new
It reduces the text section of my kernel by 3.3%, which is pretty nice.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> --- arch/arm/Kconfig | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index db524e7..1ed7968 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -23,6 +23,7 @@ config ARM select PERF_USE_VMALLOC select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) + select ARCH_SUPPORTS_OPTIMIZED_INLINING help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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