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SubjectRe: [PATCH 5/5] MIPS/Perf-events: Use unsigned delta for right shift in event update
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On Thu, 2010-11-18 at 06:56 +0000, Deng-Cheng Zhu wrote:
> Leverage the commit for ARM by Will Deacon:
> 446a5a8b1eb91a6990e5c8fe29f14e7a95b69132
> ARM: 6205/1: perf: ensure counter delta is treated as unsigned
>
> Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
> ---
> arch/mips/kernel/perf_event.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c
> index 345232a..0f1cdf5 100644
> --- a/arch/mips/kernel/perf_event.c
> +++ b/arch/mips/kernel/perf_event.c
> @@ -169,7 +169,7 @@ static void mipspmu_event_update(struct perf_event *event,
> unsigned long flags;
> int shift = 64 - TOTAL_BITS;
> s64 prev_raw_count, new_raw_count;
> - s64 delta;
> + u64 delta;
>
> again:
> prev_raw_count = local64_read(&hwc->prev_count);
> --
> 1.7.1

Acked-by: Will Deacon <will.deacon@arm.com>

You might also want to look at commit 65b4711f if you based
the MIPS port on the old ARM code.

Thanks,

Will



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