Messages in this thread | | | From | Andrew Lutomirski <> | Date | Tue, 16 Nov 2010 19:05:15 -0500 | Subject | Re: [PATCH] Improve clocksource unstable warning |
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On Fri, Nov 12, 2010 at 7:58 PM, john stultz <johnstul@us.ibm.com> wrote: > On Sat, 2010-11-13 at 00:22 +0000, john stultz wrote: >> On Fri, 2010-11-12 at 18:51 -0500, Andrew Lutomirski wrote: >> > Also wrong if cs_elapsed is just slightly less than wd_wrapping_time >> > but the wd clocksource runs enough faster that it wrapped. >> >> Ok. Good point, that's a problem. Hrmmmm. Too much math for Friday. :) > > I have a hard time leaving things alone. :) > > So this still has the issue of the u64%u64 won't work on 32bit systems, > but I think once I rework the modulo bit the following should be what > you were describing. > > It is ugly, so let me know if you have a cleaner way. >
I'm playing with this stuff now, and it looks like my (invariant, constant, single-package i7) TSC has a max_idle_ns of just over 3 seconds. I'm confused.
--Andy
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