Messages in this thread | | | Subject | Re: [PATCH 1/2] perf-events: Add support for supplementary event registers v2 | From | Peter Zijlstra <> | Date | Fri, 12 Nov 2010 18:23:50 +0100 |
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On Fri, 2010-11-12 at 17:55 +0100, Andi Kleen wrote: > static struct event_constraint * > +intel_percore_constraints(struct cpu_hw_events *cpuc, struct perf_event *event) > +{ > + struct hw_perf_event *hwc = &event->hw; > + unsigned int e = hwc->config & ARCH_PERFMON_EVENTSEL_EVENT; > + struct event_constraint *c; > + struct intel_percore *pc; > + > + if (!x86_pmu.percore_constraints) > + return NULL; > + > + for (c = x86_pmu.percore_constraints; c->cmask; c++) { > + if (e != c->code) > + continue; > + > + c = NULL; > + > + /* > + * Allocate resource per core. > + * Currently only one such per core resource can be allocated. > + */ > + pc = cpuc->per_core; > + if (!pc) > + break; > + raw_spin_lock(&pc->lock); > + if (pc->ref > 0) { > + /* Allow identical settings */ > + if (hwc->config == pc->config && > + hwc->extra_reg == pc->extra_reg && > + hwc->extra_config == pc->extra_config) {
Hrmm,. this doesn't really scale right wrt multiple extra_regs.
You made the extra_regs thing fairly extensible, but the above doesn't really work well if there's multiple extra regs (say OFFCORE and LBR_CONFIG -- possibly even the two OFFCORE regs present on westmere).
It basically needs a per-core state for each extra_reg possible.
> + pc->ref++; > + cpuc->percore_used = 1; > + } else { > + /* Deny due to conflict */ > + c = &emptyconstraint; > + } > + } else { > + pc->config = hwc->config; > + pc->extra_reg = hwc->extra_reg; > + pc->extra_config = hwc->extra_config; > + pc->ref = 1; > + cpuc->percore_used = 1; > + } > + raw_spin_unlock(&pc->lock); > + return c; > + } > + > + return NULL; > +}
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