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    Subject[PATCH 13/52] drm/i915: fix order of fence release wrt flushing
    Date
    From: Daniel Vetter <daniel.vetter@ffwll.ch>

    commit 96b47b65594fe2365f73aede060cb5203561fed3 upstream.

    i915_gem_object_unbind had the ordering wrong. The other user,
    i915_gem_object_put_fence_reg already has the correct ordering.

    Results was usually corrupted pixmaps, especially garbled font glyphs
    after a suspend/resume (because this evicts everything).

    I'm still waiting for the feedback from the bug-reporters, but
    because this obviously fixes a bug (at least for me) I'm already
    submitting it.

    Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=25406
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
    Signed-off-by: Eric Anholt <eric@anholt.net>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
    ---
    drivers/gpu/drm/i915/i915_gem.c | 7 ++++---
    1 files changed, 4 insertions(+), 3 deletions(-)

    diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
    index 5ddbd38..2e10b9a 100644
    --- a/drivers/gpu/drm/i915/i915_gem.c
    +++ b/drivers/gpu/drm/i915/i915_gem.c
    @@ -2010,9 +2010,6 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
    /* blow away mappings if mapped through GTT */
    i915_gem_release_mmap(obj);

    - if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
    - i915_gem_clear_fence_reg(obj);
    -
    /* Move the object to the CPU domain to ensure that
    * any possible CPU writes while it's not in the GTT
    * are flushed when we go to remap it. This will
    @@ -2028,6 +2025,10 @@ i915_gem_object_unbind(struct drm_gem_object *obj)

    BUG_ON(obj_priv->active);

    + /* release the fence reg _after_ flushing */
    + if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
    + i915_gem_clear_fence_reg(obj);
    +
    if (obj_priv->agp_mem != NULL) {
    drm_unbind_agp(obj_priv->agp_mem);
    drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE);
    --
    1.6.6


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