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SubjectRe: [ACS v2 1/1] clean up base on Matt Wilcox feedback.
On Wed, 16 Sep 2009 20:18:41 -0600
Matthew Wilcox <matthew@wil.cx> wrote:

> On Wed, Sep 16, 2009 at 07:07:41PM -0700, Allen Kay wrote:
> > +/* Access Control Service */
> > +#define PCI_ACS_CAP 0x04 /* ACS Capability
> > Register */ +#define PCI_ACS_CTRL 0x06 /*
> > ACS Control Register */ +#define PCI_ACS_EGRESS_CTL_V
> > 0x08 /* ACS Egress Control Vector */ +#define
> > PCI_ACS_SV 0x01 /* Source Validation */
> > +#define PCI_ACS_TB 0x02 /* Translation
> > Blocking */ +#define PCI_ACS_RR 0x04 /* P2P
> > Request Redirect */ +#define PCI_ACS_CR
> > 0x08 /* P2P Completion Redirect */ +#define
> > PCI_ACS_UF 0x10 /* Upstream Forwarding */
> > +#define PCI_ACS_EC 0x20 /* P2P Egress
> > Control */ +#define PCI_ACS_DT 0x40 /*
> > Direct Translated P2P */
>
> Oops, I wasn't clear. The convention in this file is to use one space
> after the #define for register names and two spaces for bits within
> those registers. Also, the bits generally go after the register to
> which they apply.
>
> So what I meant was more like this:
>
> #define PCI_ACS_CAP 0x04 /* ACS Capability
> Register */ #define PCI_ACS_SV 0x01 /* Source
> Validation */ #define PCI_ACS_TB 0x02 /*
> Translation Blocking */ #define PCI_ACS_RR
> 0x04 /* P2P Request Redirect */ ...
> #define PCI_ACS_CTRL 0x06 /* ACS Control
> Register */ #define PCI_ACS_EGRESS_CTL_V 0x08 /* ACS
> Egress Control Vector */
>
> Since the bits are the same between CAP and CTRL, they don't need to
> be repeated.
>
> With this change,
>
> Reviewed-by: Matthew Wilcox <willy@linux.intel.com>

Allen, easiest for me if you respin with Matthew's suggestion and a
full changelong + Matthew's reviewed-by. Then I can just git am it.

Thanks,
--
Jesse Barnes, Intel Open Source Technology Center


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