Messages in this thread | | | Date | Fri, 21 Aug 2009 16:44:16 +0200 | From | Ingo Molnar <> | Subject | Re: [PATCH -tip/core/rcu 1/6] Cleanups and fixes for RCU in face of heavy CPU-hotplug stress |
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* Steven Rostedt <rostedt@goodmis.org> wrote:
> On Fri, 21 Aug 2009, Ingo Molnar wrote: > > > * Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> wrote: > > > > > I would not trust this architecture for synchronization tests. > > > There has been reports of a hardware bug affecting the cmpxchg > > > instruction in the field. The load fence normally implied by > > > the semantic seems to be missing. AFAIK, AMD never > > > acknowledged the problem. > > > > If cmpxchg was broken i'd be having far worse problems and very > > widely so. > > I believe Mathieu is suggesting that the hardware bug is not that > the compare and exchange does not work in cmpxchg, but that it > does not provide an explicit memory barrier. Such a bug is very > hard to trigger, since it requires a race that allows a memory > write/read to cross the cmpxchg, and then have this be in such a > place that it will cause harm.
We can argue all sorts of exotic hardware bugs really, proof is still needed.
[...] > > That's not a proof of course (it's near impossible to prove the > > lack of a bug), but it's sure a strong indicator and you'll need > > to provide far more proof of misbehavior before i discount a > > bona fide regression on this box. > > But with the above said, I totally agree with your point. More > proof must be given before we can discount that another bug > exists.
Yeah. Especially given that this code was changed recently ;-)
Ingo
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