Messages in this thread Patch in this message |  | | | Date | Sat, 04 Jul 2009 14:09:36 +0900 | | From | Tejun Heo <> | | Subject | [PATCH 2/3] pci,sparc64: drop PCI_CACHE_LINE_BYTES |
sparc64 is now the only user of PCI_CACHE_LINE_BYTES. Drop it and set pci_dfl_cache_line_size from pcibios_init() instead and drop PCI_CACHE_LINE_BYTES handling from generic pci code.
Orignally-From: David Miller <davem@davemloft.net> Signed-off-by: Tejun Heo <tj@kernel.org> --- arch/sparc/include/asm/pci_64.h | 2 -- arch/sparc/kernel/pci.c | 7 +++++++ drivers/pci/pci.c | 6 +----- 3 files changed, 8 insertions(+), 7 deletions(-) Index: work/arch/sparc/kernel/pci.c =================================================================== --- work.orig/arch/sparc/kernel/pci.c +++ work/arch/sparc/kernel/pci.c @@ -1081,3 +1081,10 @@ void pci_resource_to_user(const struct p *start = rp->start - offset; *end = rp->end - offset; } + +static int __init pcibios_init(void) +{ + pci_dfl_cache_line_size = 64 >> 2; + return 0; +} +subsys_initcall(pcibios_init); Index: work/arch/sparc/include/asm/pci_64.h =================================================================== --- work.orig/arch/sparc/include/asm/pci_64.h +++ work/arch/sparc/include/asm/pci_64.h @@ -17,8 +17,6 @@ #define PCI_IRQ_NONE 0xffffffff -#define PCI_CACHE_LINE_BYTES 64 - static inline void pcibios_set_master(struct pci_dev *dev) { /* No special bus mastering setup handling */ Index: work/drivers/pci/pci.c =================================================================== --- work.orig/drivers/pci/pci.c +++ work/drivers/pci/pci.c @@ -41,17 +41,13 @@ int pci_domains_supported = 1; unsigned long pci_cardbus_io_size = DEFAULT_CARDBUS_IO_SIZE; unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE; -#ifndef PCI_CACHE_LINE_BYTES -#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES -#endif - /* * The default CLS is used if arch didn't set CLS explicitly and not * all pci devices agree on the same value. Arch can override either * the dfl or actual value as it sees fit. Don't forget this is * measured in 32-bit words, not bytes. */ -u8 pci_dfl_cache_line_size __initdata = PCI_CACHE_LINE_BYTES >> 2; +u8 pci_dfl_cache_line_size __initdata = L1_CACHE_BYTES >> 2; u8 pci_cache_line_size; /**
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