Messages in this thread Patch in this message |  | | | Subject | [PATCH 4/9 -tip] x86: mtrr/cyrix.c fix trivial style problems | | From | Jaswinder Singh Rajput <> | | Date | Sat, 04 Jul 2009 07:52:08 +0530 |
Fix trivial style problems :
WARNING: Use #include <linux/io.h> instead of <asm/io.h> WARNING: line over 80 characters ERROR: do not initialise statics to 0 or NULL ERROR: space prohibited after that open parenthesis '(' X 2 ERROR: space prohibited before that close parenthesis ')' X 2 ERROR: trailing whitespace X 2 ERROR: trailing statements should be on next line ERROR: do not use C99 // comments X 2 Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> --- arch/x86/kernel/cpu/mtrr/cyrix.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/cyrix.c b/arch/x86/kernel/cpu/mtrr/cyrix.c index ff14c32..f01c723 100644 --- a/arch/x86/kernel/cpu/mtrr/cyrix.c +++ b/arch/x86/kernel/cpu/mtrr/cyrix.c @@ -1,8 +1,8 @@ #include <linux/init.h> +#include <linux/io.h> #include <linux/mm.h> #include <asm/mtrr.h> #include <asm/msr.h> -#include <asm/io.h> #include <asm/processor-cyrix.h> #include <asm/processor-flags.h> #include "mtrr.h" @@ -114,7 +114,10 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) if (lsize == 0) return i; } - /* ARR0-ARR6 isn't free, try ARR7 but its size must be at least 256K */ + /* + * ARR0-ARR6 isn't free + * try ARR7 but its size must be at least 256K + */ cyrix_get_arr(i, &lbase, &lsize, <ype); if ((lsize == 0) && (size >= 0x40)) return i; @@ -122,21 +125,22 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) return -ENOSPC; } -static u32 cr4 = 0; -static u32 ccr3; +static u32 cr4, ccr3; static void prepare_set(void) { u32 cr0; /* Save value of CR4 and clear Page Global Enable (bit 7) */ - if ( cpu_has_pge ) { + if (cpu_has_pge) { cr4 = read_cr4(); write_cr4(cr4 & ~X86_CR4_PGE); } - /* Disable and flush caches. Note that wbinvd flushes the TLBs as - a side-effect */ + /* + * Disable and flush caches. + * Note that wbinvd flushes the TLBs as a side-effect + */ cr0 = read_cr0() | X86_CR0_CD; wbinvd(); write_cr0(cr0); @@ -157,12 +161,12 @@ static void post_set(void) /* Cyrix ARRs - everything else was excluded at the top */ setCx86(CX86_CCR3, ccr3); - + /* Enable caches */ write_cr0(read_cr0() & 0xbfffffff); /* Restore value of CR4 */ - if ( cpu_has_pge ) + if (cpu_has_pge) write_cr4(cr4); } @@ -178,7 +182,8 @@ static void cyrix_set_arr(unsigned int reg, unsigned long base, size >>= 6; size &= 0x7fff; /* make sure arr_size <= 14 */ - for (arr_size = 0; size; arr_size++, size >>= 1) ; + for (arr_size = 0; size; arr_size++, size >>= 1) + ; if (reg < 7) { switch (type) { @@ -248,7 +253,7 @@ static void cyrix_set_all(void) for (; i < 7; i++) setCx86(CX86_CCR4 + i, ccr_state[i]); for (i = 0; i < 8; i++) - cyrix_set_arr(i, arr_state[i].base, + cyrix_set_arr(i, arr_state[i].base, arr_state[i].size, arr_state[i].type); post_set(); @@ -256,7 +261,6 @@ static void cyrix_set_all(void) static struct mtrr_ops cyrix_mtrr_ops = { .vendor = X86_VENDOR_CYRIX, -// .init = cyrix_arr_init, .set_all = cyrix_set_all, .set = cyrix_set_arr, .get = cyrix_get_arr, @@ -270,5 +274,3 @@ int __init cyrix_init_mtrr(void) set_mtrr_ops(&cyrix_mtrr_ops); return 0; } - -//arch_initcall(cyrix_init_mtrr); -- 1.6.0.6
|  |