Messages in this thread |  | | | Subject | Re: [numbers] perfmon/pfmon overhead of 17%-94% | | From | Andi Kleen <> | | Date | Fri, 03 Jul 2009 20:31:04 +0200 |
Vince Weaver <vince@deater.net> writes: > > as I said in a previous post, on most x86 chips the instructions_retired > counter also includes any hardware interrupts that occur during the > process runtime.
On the other hand afaik near all chips have interrupt performance counter events.
So if you're willing to waste one of the variable counter registers you can always count those and then correct based on the other count.
But the question is of course if it's worth it, the error should be really small. Also you could always lose a few cycles occasionally in other "random" events, which can happen too.
> So any clock interrupts, etc, show up as an extra > instruction. So on the "million" benchmark, it's usually +/- 2 extra > instructions.
1-2 error in a million doesn't sound like a catastrophic problem.
-Andi
-- ak@linux.intel.com -- Speaking for myself only.
|  |