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Subject[RFC PATCH 0/20 v2] marry mcheck to EDAC
Date
Hi,

this is the second version of the mcheck/EDAC marriage patches. Changes
from the first version include:

* MCE decoding has moved into the EDAC core and is being unconditionally
enabled on AMD hardware when EDAC is compiled in.

* The amd64_edac module registers a bus error handler with the EDAC MCE
code which does the additional decoding of bank 4 errors (CECC/UECCs)
and mapping to DIMMs.

I've also added the topology patches by Andreas for reference here.
amd64_edac needs the node id (cpuinfo_x86.cpu_node_id) an MCE has
happened on (and thus the respective memory controller) in order to get
that node's DRAM configuration before further decoding any error info.

As always, give them a good critical look and let me know of any issues.

arch/x86/kernel/cpu/mcheck/mce.c | 12 +-
drivers/edac/Makefile | 6 +-
drivers/edac/amd64_edac.c | 324 +++++++++-------------------
drivers/edac/amd64_edac.h | 71 +------
drivers/edac/amd64_edac_dbg.c | 2 +-
drivers/edac/amd64_edac_err_types.c | 161 --------------
drivers/edac/edac_mce_amd.c | 412 +++++++++++++++++++++++++++++++++++
drivers/edac/edac_mce_amd.h | 68 ++++++
8 files changed, 604 insertions(+), 452 deletions(-)
--
Thanks,
Boris.



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