Messages in this thread | | | From | Arnd Bergmann <> | Subject | Re: Do cpu-endian MMIO accessors exist? | Date | Wed, 22 Jul 2009 10:35:49 +0200 |
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On Wednesday 22 July 2009, Jiri Slaby wrote: > No, I should have written this explicitly. I meant read* have a barrier, > whereas ioread* do not. Similarly for writes. Is this expected? > > For example: > #define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) > #define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; }) > #define ioread32(a) __raw_readl(a)
No, this looks like a bug. I would have expected
#define ioread32(a) readl(a)
in this case. Also, ioread32 should actually multiplex between readl() and inl() based on the address token, as the code in lib/iomap.c does. It's probably easy enough to enable CONFIG_GENERIC_IOMAP on sh, and remove the ioread*/iowrite* macros from arch/sh/include/asm/io.h.
Arnd <><
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