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SubjectRe: Linux 2.6.30-rc8 [also: VIA Support]
Date
On Thu June 4 2009, Dave Jones wrote:
> On Thu, Jun 04, 2009 at 06:26:40PM -0500, Michael S. Zick wrote:
> > On Thu June 4 2009, Michael S. Zick wrote:
> > > On Thu June 4 2009, Dave Jones wrote:
> > > > On Thu, Jun 04, 2009 at 04:38:13PM -0500, Michael S. Zick wrote:
> > >
> >
> > I have it now, you where speaking of the "product vendor Centaur"
> > not a specific model name "Centaur".
> >
> > Which I translate into: that statement block needs to be converted into
> > (possibly nested) switch statement(s).
> > Since there is not a "model check" in it only a "Series" and "Vendor" check.
> >
> > Yuck.
>
> I meant just doing something like this..
>
> (untested)
>
> I'm not sure if the clflush_size==0 case can happen, which is why
> I left the fallback. Maybe on ancient cpus?
>
> Dave
>
> diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
> index 2202b62..a293c71 100644
> --- a/arch/x86/pci/common.c
> +++ b/arch/x86/pci/common.c
> @@ -426,11 +426,14 @@ int __init pcibios_init(void)
> * and P4. It's also good for 386/486s (which actually have 16)
> * as quite a few PCI devices do not support smaller values.
> */
> - pci_cache_line_size = 32 >> 2;
> - if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
> - pci_cache_line_size = 64 >> 2; /* K7 & K8 */
> - else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
> - pci_cache_line_size = 128 >> 2; /* P4 */
> +
> + if (c->x86_clflush_size > 0)
> + pci_cache_line_size = c->x86_clflush_size >> 2;
> + else
> + pci_cache_line_size = 32 >> 2;
> +
> + printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
> + pci_cache_line_size >> 2);
>
> pcibios_resource_survey();
>

That would clean up the code and deal with the situation.
Sorry I was so slow about following what you meant. Age.

Will put that in tomorrows build instead of my idea.

Mike
>
>




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