Messages in this thread | | | From | "Michael S. Zick" <> | Subject | Re: Linux 2.6.30-rc8 [also: VIA Support] | Date | Thu, 4 Jun 2009 13:12:43 -0500 |
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On Thu June 4 2009, Harald Welte wrote: > On Thu, Jun 04, 2009 at 11:21:28AM -0500, Michael S. Zick wrote: > > > That is one of my pending questions - - > > (It is included as a comment at the appropriate point in my patchset.) > > > > The VIA processors have MCR's not MTRR's - - > > AFAIK, that was true for processors like the Winhcip / C6, i.e. earlier than > the C3. The C3, C7 and later support 8 intel-style MTRR's. >
Super! A specific breakage!
The c7 setup code is re-using the c6 setup code (MCR's) - - Will "if 0" out the appropriate parts and arrange for the MTRR setup.
@Linus - - The Debian/Ubuntu distribution kernels require irqpoll (2.6.28+) - I took that out very early in my testing, when that problem got fixed - I will also try putting that back in, it might be needed for some of its side-effects on the processor/chipset.
> > The C7-M processor uses "in-order retirement" not "out-of-order" - - > > I think the MCR's **should not** be set for "weak ordered writes" - > > why would it matter on UP? as indicated, I'm not the expert here, but I thought > memory ordering issues only arise in SMP systems [or possibly with regard to > DMA, but as we already explored much earlier in this thread, drivers that access > DMA buffers whil the hardware owns them are buggy and need to be fixed] >
I just recall the problems with the pa-risc port (not all machines have coherent I/O); some have consistent I/O only. I have one of those also, lucky me. ;)
Mike > Regards,
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