Messages in this thread | | | Date | Tue, 23 Jun 2009 10:18:28 +0200 | From | Ingo Molnar <> | Subject | Re: [PATCH -tip] perf_counter tool: builtin-stat add more events |
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* Jaswinder Singh Rajput <jaswinder@kernel.org> wrote:
> Added more events not it looks like on AMD box : > > ./perf stat -- ls -lR > /dev/null > > Performance counter stats for 'ls -lR': > > 2507744774 cycles # 2085.473 M/sec (scaled from 13.28%) > 1515534968 instructions # 0.604 IPC (scaled from 13.28%) > 783181797 cache-references # 651.304 M/sec (scaled from 36.36%) > 18089523 cache-misses # 15.043 M/sec (scaled from 36.37%) > 195550613 branches # 162.622 M/sec (scaled from 36.29%) > 14623394 branch-misses # 12.161 M/sec (scaled from 36.29%) > <not counted> bus-cycles > 1203.182949 cpu-clock-msecs > 1202.482671 task-clock-msecs # 0.990 CPUs > 454 page-faults # 0.000 M/sec > 454 minor-faults # 0.000 M/sec > 0 major-faults # 0.000 M/sec > 133 context-switches # 0.000 M/sec > 1 CPU-migrations # 0.000 M/sec > 744421154 L1-data-Cache-Load-Referencees # 619.070 M/sec (scaled from 13.20%) > 5220656 L1-data-Cache-Load-Misses # 4.342 M/sec (scaled from 13.28%) > 438576 L1-data-Cache-Store-Referencees # 0.365 M/sec (scaled from 13.36%) > <not counted> L1-data-Cache-Store-Misses > 1976596 L1-data-Cache-Prefetch-Referencees # 1.644 M/sec (scaled from 13.44%) > 1644021 L1-data-Cache-Prefetch-Misses # 1.367 M/sec (scaled from 13.52%) > 764273224 L1-instruction-Cache-Load-Referencees # 635.579 M/sec (scaled from 13.53%) > 17242789 L1-instruction-Cache-Load-Misses # 14.339 M/sec (scaled from 13.53%) > <not counted> L1-instruction-Cache-Store-Referencees > <not counted> L1-instruction-Cache-Store-Misses > 372621 L1-instruction-Cache-Prefetch-Referencees # 0.310 M/sec (scaled from 13.53%) > <not counted> L1-instruction-Cache-Prefetch-Misses > 22844109 L2-Cache-Load-Referencees # 18.997 M/sec (scaled from 13.53%) > 2235733 L2-Cache-Load-Misses # 1.859 M/sec (scaled from 13.53%) > 23949920 L2-Cache-Store-Referencees # 19.917 M/sec (scaled from 13.46%) > <not counted> L2-Cache-Store-Misses > <not counted> L2-Cache-Prefetch-Referencees > <not counted> L2-Cache-Prefetch-Misses > 732364670 Data-TLB-Cache-Load-Referencees # 609.044 M/sec (scaled from 13.45%) > 16516548 Data-TLB-Cache-Load-Misses # 13.735 M/sec (scaled from 13.42%) > <not counted> Data-TLB-Cache-Store-Referencees > <not counted> Data-TLB-Cache-Store-Misses > <not counted> Data-TLB-Cache-Prefetch-Referencees > <not counted> Data-TLB-Cache-Prefetch-Misses > 766865920 Instruction-TLB-Cache-Load-Referencees # 637.736 M/sec (scaled from 13.42%) > 19981 Instruction-TLB-Cache-Load-Misses # 0.017 M/sec (scaled from 13.40%) > <not counted> Instruction-TLB-Cache-Store-Referencees > <not counted> Instruction-TLB-Cache-Store-Misses > <not counted> Instruction-TLB-Cache-Prefetch-Referencees > <not counted> Instruction-TLB-Cache-Prefetch-Misses > 308272002 Branch-Cache-Load-Referencees # 256.363 M/sec (scaled from 13.33%) > 19226358 Branch-Cache-Load-Misses # 15.989 M/sec (scaled from 13.28%) > <not counted> Branch-Cache-Store-Referencees > <not counted> Branch-Cache-Store-Misses > <not counted> Branch-Cache-Prefetch-Referencees > <not counted> Branch-Cache-Prefetch-Misses
Looks useful - but it would be nice to not touch the default 'perf stat' output but instead offer a few 'sets' of pre-defined events, which can be specified in the event list, such as:
perf stat -e cache-events perf stat -e all-cache-events perf stat -e sw-events
Perhaps also a:
perf stat -e all
To get output from all counters that we know about.
Regex matching on event specifiers would be useful too - there's already regex code in perf-report, see the --parent option.
Ingo
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