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SubjectRe: [PATCH] X86: cpu_debug support for VIA / Centaur CPU's
Date
On Wed June 10 2009, Ingo Molnar wrote:
>
> * H. Peter Anvin <hpa@kernel.org> wrote:
>
> > Ingo Molnar wrote:
> > >
> > > MSRs should really be enumerated along CPU features. They will be
> > > accessed if a CPU offers that CPU feature.
> > >
> >
> > Nice in theory, but so many MSRs have to be enumerated with obscure test
> > combinations, that it really isn't practical in the general case. That
> > is why we have the safe MSR variants.
> >
> > >
> > > Yeah, the safe read should never fault - there should be all
> > > zeroes or an error return.
> > >
> >
> > Error return, MSRs #GP if not present. All zero means a present
> > MSR (which is zero.)
>
> yes, of course - i meant the /debug/x86/cpu/* behavior: it should
> either result zeroes, or should return -EINVAL. (probably the
> latter)
>

Return zeroes - same as hardware case for bits which can't be set.
Returning -EINVAL might match a specific bit pattern caller is looking for.

Mike
> Ingo
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