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SubjectRe: [PATCH]X86: make sparse mem work in non-NUMA mode
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On Tue, 2009-05-12 at 15:59 +0800, Ingo Molnar wrote:
> * Shaohua Li <shaohua.li@intel.com> wrote:
>
> > With sparse, memory holes should not be marked present for memmap.
> > This patch makes sparse really works on non-NUMA mode.
> >
> > Signed-off-by: Shaohua Li <shaohua.li@intel.com>
> > Signed-off-by: Sheng Yang <sheng.yang@intel.com>
>
> It does not apply cleanly to the latest x86 tree:
>
> patching file arch/x86/mm/init_32.c
> Hunk #1 succeeded at 718 (offset -43 lines).
> patching file arch/x86/mm/init_64.c
> Hunk #1 FAILED at 638.
> 1 out of 1 hunk FAILED -- rejects in file arch/x86/mm/init_64.c
Looks the x64 code already has the fix.

With sparse, memory holes should not be marked present for memmap.
This patch makes sparse really works on SMP mode.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Sheng Yang <sheng.yang@intel.com>

diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 9cdd9b0..5da919b 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -718,15 +718,15 @@ void __init initmem_init(unsigned long start_pfn,
highstart_pfn = highend_pfn = max_pfn;
if (max_pfn > max_low_pfn)
highstart_pfn = max_low_pfn;
- memory_present(0, 0, highend_pfn);
e820_register_active_regions(0, 0, highend_pfn);
+ sparse_memory_present_with_active_regions(0);
printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",
pages_to_mb(highend_pfn - highstart_pfn));
num_physpages = highend_pfn;
high_memory = (void *) __va(highstart_pfn * PAGE_SIZE - 1) + 1;
#else
- memory_present(0, 0, max_low_pfn);
e820_register_active_regions(0, 0, max_low_pfn);
+ sparse_memory_present_with_active_regions(0);
num_physpages = max_low_pfn;
high_memory = (void *) __va(max_low_pfn * PAGE_SIZE - 1) + 1;
#endif



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