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Subject[PATCH 9/15 -tip] x86: Add cpufeature for Hardware configuration
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X86_FEATURE_HW_CFG : MSRC001_0015 Hardware Configuration Register (HWCR)

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/kernel/cpu/amd.c | 4 ++++
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 6eb9134..13050e9 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -163,6 +163,7 @@
#define X86_FEATURE_FSB_FREQ (7*32+ 8) /* Scaleable bus speed */
#define X86_FEATURE_MISC (7*32+ 9) /* Miscellaneous features */
#define X86_FEATURE_PLATFORM (7*32+ 10) /* Platform feature */
+#define X86_FEATURE_HW_CFG (7*32+ 11) /* Hardware configuration */

/* Virtualization flags: Linux defined */
#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index e2fe8e2..b2bccd2 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -478,6 +478,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
#endif

/* Set cpufeatures for miscellaneous MSRs */
+ if (c->x86 >= 7) { /* K7+ */
+ /* MSRC001_0015 Hardware Configuration Register (HWCR) */
+ set_cpu_cap(c, X86_FEATURE_HW_CFG);
+ }
if (c->x86 >= 0x10) { /* fam10h+ */
/* MSRC001_1022 Data Cache Configuration (DC_CFG) */
set_cpu_cap(c, X86_FEATURE_CACHE_CTL);
--
1.6.0.6




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