lkml.org 
[lkml]   [2009]   [Mar]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 08/57] microblaze_v7: Interrupt handling, timer support, selfmod code
Thomas,
> Michal,
>
> On Fri, 20 Mar 2009, Michal Simek wrote:
>>> I guess the problem is in your chip->xxx functions.
>> I fixed it. There were one additional line.
>> + I set GENERIC_HARDIRQS_NO__DO_IRQ=y.
>
> Cool.

:-)

NO_HZ works too. Here is the log.

# cat /proc/interrupts
CPU0
3: 3827 level INTC timer
8: 1834 edge INTC uartlite
# uptime
00:16:47 up 16 min, load average: 0.00, 0.00, 0.00
# uptime
00:17:53 up 17 min, load average: 0.00, 0.00, 0.00
# cat /proc/interrupts
CPU0
3: 4105 level INTC timer
8: 1913 edge INTC uartlite
# uptime
00:21:44 up 21 min, load average: 0.00, 0.00, 0.00
# cat /proc/interrupts
CPU0
3: 4615 level INTC timer
8: 1970 edge INTC uartlite
#

>
>> BTW: Below is full chip description where function enable is unmask
>> and disable is mask. Do I have keep there enable and disable function pointers?
>> I commented them and works without them too.
>
> Right. The generic code does:
>
> if (!chip->enable)
> chip->enable = default_enable;
> if (!chip->disable)
> chip->disable = default_disable;

I look at default implementation and seems to me that I can save some
instruction when I use my enable function not generic one and for disabling is
default function faster because do nothing.
I am going to send one email with full intc.c + 2 changes - one in irq.c and
second in Kconfig.

Thanks,
Michal

>
> Thanks,
>
> tglx


--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854


\
 
 \ /
  Last update: 2009-03-20 15:29    [W:0.303 / U:0.104 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site