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    Subject[PATCH 05/11] perf_counter: add comment to barrier
    We need to ensure the enabled=0 write happens before we start disabling
    the actual counters, so that a pcm_amd_enable() will not enable one underneath
    us.

    I think the race is impossible anyway, we always balance the ops within any
    one context and perform enable() with IRQs disabled.

    Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
    ---
    arch/x86/kernel/cpu/perf_counter.c | 4 ++++
    1 file changed, 4 insertions(+)

    Index: linux-2.6/arch/x86/kernel/cpu/perf_counter.c
    ===================================================================
    --- linux-2.6.orig/arch/x86/kernel/cpu/perf_counter.c
    +++ linux-2.6/arch/x86/kernel/cpu/perf_counter.c
    @@ -247,6 +247,10 @@ static u64 pmc_amd_save_disable_all(void

    enabled = cpuc->enabled;
    cpuc->enabled = 0;
    + /*
    + * ensure we write the disable before we start disabling the
    + * counters proper, so that pcm_amd_enable() does the right thing.
    + */
    barrier();

    for (idx = 0; idx < nr_counters_generic; idx++) {
    --



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