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    SubjectRe: smp.c && barriers (Was: [PATCH 1/4] generic-smp: remove single ipi fallback for smp_call_function_many())

    * Suresh Siddha <suresh.b.siddha@intel.com> wrote:

    > On Wed, 2009-02-18 at 11:17 -0800, Ingo Molnar wrote:
    > > * Suresh Siddha <suresh.b.siddha@intel.com> wrote:
    > >
    > > > > Indeed that could cause problems on some architectures which I
    > > > > had hoped to avoid. So the patch is probably better off to first
    > > > > add the smp_mb() to arch_send_call_function_xxx arch code, unless
    > > > > it is immediately obvious or confirmed by arch maintainer that
    > > > > such barrier is not required.
    > > >
    > > > For x2apic specific operations we should add the smp_mb() sequence. But
    > > > we need to make sure that we don't end up doing it twice (once in
    > > > generic code and another in arch code) for all the ipi paths.
    > >
    > > right now we do have an smp_mb() due to your fix in November.
    > >
    > > So what should happen is to move that smp_mb() from the x86
    > > generic IPI path to the x86 x2apic IPI path. (and turn it into
    > > an smp_wmb() - that should be enough - we dont care about future
    > > reads being done sooner than this point.)
    >
    > Ingo, smp_wmb() won't help. x2apic register writes can still
    > go ahead of the sfence. According to the SDM, we need a
    > serializing instruction or mfence. Our internal experiments
    > also proved this.

    ah, yes - i got confused about how an x2apic write can pass a
    _store_ fence.

    The reason is that an MSR write is a register->register move
    (not a memory write), so it it not part of the generic memory
    ordering machinery. So a serializing instruction it has to be.

    > Appended is the x86 portion of the patch: ---
    >
    > From: Suresh Siddha <suresh.b.siddha@intel.com>
    > Subject: x86: move smp_mb() in x86 flush tlb path to x2apic specific IPI
    > paths

    Could you please refresh this patch to latest tip:master? The
    APIC drivers moved to arch/x86/kernel/apic/.

    Ingo


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