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SubjectRe: [PATCH] perf_events: improve Intel event scheduling
On Mon, Dec 21, 2009 at 04:40:40PM +0100, Peter Zijlstra wrote:

> I'm not really seeing the problem here...
>
>
> perf_disable() <-- shut down the full pmu
>
> pmu->disable() <-- hey someone got removed (easy free the reg)
> pmu->enable() <-- hey someone got added (harder, check constraints)
>
> hw_perf_group_sched_in() <-- hey a full group got added
> (better than multiple ->enable)
>
> perf_enable() <-- re-enable pmu
>
>
> So ->disable() is used to track freeing, ->enable is used to add
> individual counters, check constraints etc..
>
> hw_perf_group_sched_in() is used to optimize the full group enable.
>
> Afaict that is what power does (Paul?) and that should I think be
> sufficient to track x86 as well.

That sounds right to me.

> Since sched_in() is balanced with sched_out(), the ->disable() calls
> should provide the required information as to the occupation of the pmu.
> I don't see the need for more hooks.
>
> Paul, could you comment, since you did all this for power?

On powerpc we maintain a list of currently enabled events in the arch
code. Does x86 do that as well?

If you have the list (or array) of events easily accessible, it's
relatively easy to check whether the whole set is feasible at any
point, without worrying about which events were recently added. The
perf_event structure has a spot where the arch code can store which
PMU register is used for that event, so you can easily optimize the
case where the event doesn't move.

Like you, I'm not seeing where the difficulty lies. Perhaps Stephane
could give us a detailed example if he still thinks there's a
difficulty.

Paul.


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