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    SubjectRe: [PATCH] MIPS: Fixups of ALSA memory maps
    On Mon, Nov 16, 2009 at 06:12:22PM +0100, Takashi Iwai wrote:

    > Actually, this has been a looong-standing problem.
    > I have a series of patches to fix these issues, but it's more
    > intensively involved with dma_*() functions.
    > The patches can be found in test/dma-fix branch of sound GIT tree.
    > git:// test/dma-fix
    > This basically adds dma_mmap_coherent() function to feasible
    > architectures, which is already implemented for ARM, so far.

    Cool - but needs a little further tweaking to work right. That's a
    solution which will use uncached accesses on all MIPS systems.

    IP27/IP35-family machines will explode when you try that. Eventually the
    cache coherency logic will notice that cache, directory caches and memory
    have become inconsistent and bombard the CPU with a bunch of nasty

    For cache-coherent machines otoh it's a big waste of performance.

    int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
    void *cpu_addr, dma_addr_t handle, size_t size)
    struct page *pg;

    if (!plat_device_is_coherent(dev))
    vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
    cpu_addr = (void *)dma_addr_to_virt(handle);
    pg = virt_to_page(cpu_addr);

    return remap_pfn_range(vma, vma->vm_start,
    page_to_pfn(pg) + vma->vm_pgoff,
    size, vma->vm_page_prot);

    Thomas - you're the IP28 specialist. Would the plat_device_is_coherent()
    above have to become a cpu_is_noncoherent_r10000() call? Any further


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      Last update: 2009-11-16 18:45    [W:0.030 / U:3.660 seconds]
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