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    Subject[PATCH] pci: fix crash about old IA64 about pci_cfg_space_size

    Brad reported that his SGI 750 (Itanium 1) will crash from 2.6.26, and bisected

    | commit: dfadd9edff498d767008edc6b2a6e86a7a19934d
    |Many host bridges support a 4k config space, so check them directy
    |instead of using quirks to add them.
    |We only need to do this extra check for host bridges at this point,
    |because only host bridges are known to have extended address space
    |without also having a PCI-X/PCI-E caps. Other devices with this
    |property could be done with quirks (if there are any).
    |As a bonus, we can remove the quirks for AMD host bridges with family
    |10h and 11h since they're not needed any more.
    |With this patch, we can get correct pci cfg size of new Intel CPUs/IOHs
    |with host bridges.

    it turns out for old IA64 without SAL 3.2 pci_cfg_space_size_ext will cause
    problem and those system didn't have PCI-X and PCI-E, so that function was
    not called before.

    so don't call it in pci_cfg_sapce_size now.
    later call it after pci ops code in ia64 could detect and use raw_pci_ops
    and raw_pci_ext_ops according to SAL version.

    Reported-by: Brad Spengler <>
    Bisected-by: Brad Spengler <>
    Tested-by: Brad Spengler <>
    Signed-off-by: Yinghai Lu <>

    diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
    index 8105e32..0c80a07 100644
    --- a/drivers/pci/probe.c
    +++ b/drivers/pci/probe.c
    @@ -901,11 +901,24 @@ int pci_cfg_space_size(struct pci_dev *dev)
    int pos;
    u32 status;
    +#ifndef CONFIG_IA64
    + * not use it with IA64 at this point
    + * ia64 SAL 3.2 before doesn't support ext space, so
    + * pci_read_config_dword(dev, 0x100, &status) would cause GP
    + * the problem is not triggered, because system with SAL 3.2 before
    + * doesn't include PCI-X 2.0 or PCI Express, so pci_cfg_spce_size_ext()
    + * is not called with them.
    + * need to extend ia64 to detect sal version, and pci_root_ops
    + * to use raw_pci_ops and raw_pci_ext_ops like x86
    + */
    u16 class;

    class = dev->class >> 8;
    if (class == PCI_CLASS_BRIDGE_HOST)
    return pci_cfg_space_size_ext(dev);

    pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
    if (!pos) {

     \ /
      Last update: 2009-10-11 23:07    [W:0.021 / U:7.876 seconds]
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