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SubjectRe: [PATCH] dmatest: flush and invalidate destination buffer before DMA
On Thu, Jan 08, 2009 at 09:36:03AM +0100, Haavard Skinnemoen wrote:

> In the general case, however, I think MIPS has a bug: I've seen drivers
> DMA to/from tiny buffers stored inside another struct. This is legal
> because the driver can guarantee that the other fields in the struct
> aren't accessed in the mean time, but any fields sharing a cacheline
> with the buffer must be written back before the lines are invalidated.

Depending on the implementation details, the use of such a struct might be
relying on implementation-specific behaviour. This is what
Documentation/DMA-API.txt has to say:


Returns the processor cache alignment. This is the absolute minimum
alignment *and* width that you must observe when either mapping
memory or doing partial flushes.

Notes: This API may return a number *larger* than the actual cache
line, but it will guarantee that one or more cache lines fit exactly
into the width returned by this call. It will also always be a power
of two for easy alignment.

Since dma_get_cache_alignment() is a function not a constant its result
can't be used in the definition of a struct unless possibly excessive
padding is used.

The debate has shown that we problably need BUG_ON() assertions in the
DMA API implementations to catch this sort of dangerous use.


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