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SubjectRe: dw_dmac driver questions
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On Tue, 6 Jan 2009 11:14:03 +0100, Haavard Skinnemoen <haavard.skinnemoen@atmel.com> wrote:
> > 1) driver enqueue desc A to active list and start DMA engine
> > 2) driver enqueue desc B to queue list
> > 3) driver enqueue desc C to queue list (desc C contains bad address)
> > 4) DMA engine finish desc A and raise interrupt
> > 5) tasklet remove desc A from active list and move desc B and C to active list
> > 6) DMA engine finish desc B and raise interrupt
> > 7) DMA engine abort desc C and raise interrupt
> > 8) tasklet detect error
> >
> > The point is the order of (7) and (8) cannot be expected. If (7)
> > comes first, the head of the active list contains desc B at (8) and
> > that is not a bad descriptor.
>
> The tasklet won't detect any errors unless the DMA controller flags it,
> so (7) must happen before (8). That does not necessarily mean that the
> interrupts from (6) and (7) get handled before (8), but I don't think
> it matters because dwc_handle_error() calls dwc_scan_descriptors(),
> which will remove desc B from the active list if it is finished. And it
> must be finished if desc C has failed, so the failed descriptor will
> always be at the head of the queue after dwc_scan_descriptors() returns.

Oh I understand. I overlooked dwc_scan_descriptors() call at
beginning of dwc_handle_error(). Thank you for explanation.

---
Atsushi Nemoto

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