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    SubjectRe: [PATCH C 07/13] OMAP3 clock: recalculate DPLL subtree after bypass entry/exit
    On Wed, Jan 28, 2009 at 12:08:29PM -0700, Paul Walmsley wrote:
    > The DPLL's rate changes when it enters or leaves bypass, so the DPLL's
    > rate and the rates of all dependent clocks need to be recalculated
    > when this happens.
    > Also, fix test for bypass to test against the appropriate bypass clock,
    > rather than the parent clock (which is not the bypass clock for DPLL1
    > and DPLL2).

    Surely this is a bug fix to the previous patch?

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      Last update: 2009-01-29 11:35    [W:0.020 / U:1.928 seconds]
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