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    SubjectRe: [PATCH C 06/13] OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck
    On Wed, Jan 28, 2009 at 12:08:26PM -0700, Paul Walmsley wrote:
    > static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
    > {
    > u16 freqsel;
    > struct dpll_data *dd;
    > + int ret;

    So 'ret' is a new variable...

    >
    > if (!clk || !rate)
    > return -EINVAL;
    > @@ -389,18 +393,32 @@ static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
    > if (rate == omap2_get_dpll_rate(clk))
    > return 0;
    >
    > - if (dd->last_rounded_rate != rate)
    > - omap2_dpll_round_rate(clk, rate);
    > + if (dd->bypass_clk->rate == rate &&
    > + (clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
    >
    > - if (dd->last_rounded_rate == 0)
    > - return -EINVAL;
    > + pr_debug("clock: %s: set rate: entering bypass.\n", clk->name);
    > +
    > + ret = _omap3_noncore_dpll_bypass(clk);

    which is assigned to...

    > +

    Additional noise.

    > + } else {
    > +

    More noise.

    > + if (dd->last_rounded_rate != rate)
    > + omap2_dpll_round_rate(clk, rate);
    >
    > - freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);
    > - if (!freqsel)
    > - WARN_ON(1);
    > + if (dd->last_rounded_rate == 0)
    > + return -EINVAL;
    >
    > - omap3_noncore_dpll_program(clk, dd->last_rounded_m, dd->last_rounded_n,
    > - freqsel);
    > + freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);
    > + if (!freqsel)
    > + WARN_ON(1);
    > +
    > + pr_debug("clock: %s: set rate: locking rate to %lu.\n",
    > + clk->name, rate);
    > +
    > + ret = omap3_noncore_dpll_program(clk, dd->last_rounded_m,
    > + dd->last_rounded_n, freqsel);

    Assigned to again...

    > +

    More noise.

    > + }
    >
    > omap3_dpll_recalc(clk);
    >

    But ret is never actually used.


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      Last update: 2009-01-29 11:33    [W:0.024 / U:0.092 seconds]
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