Messages in this thread | | | Date | Wed, 28 Jan 2009 14:27:22 -0500 | Subject | Re: [LLVMdev] inline asm semantics: output constraint width smaller than input | From | Kyle Moffett <> |
| |
On Wed, Jan 28, 2009 at 12:29 PM, H. Peter Anvin <hpa@zytor.com> wrote: > Kyle Moffett wrote: >> Even in the 64-bit-integer on 32-bit-CPU case, you still end up with >> the lower 32-bits in a standard integer GPR, and it's trivial to just >> ignore the "upper" register. You also would not need to do any kind >> of bit-shift, so long as your inline assembly initializes both GPRs >> and puts the halves of the result where they belong. > > In this case, we're talking about what happens when the assembly takes a > 64-bit input operand in the same register as a 32-bit output operand > (with a "0" constraint.) Is the output operand the same register number > as the high register or the low register? On an LE machine the answer > is trivial and obvious -- the low register; on a BE machine both > interpretations are possible (I actually suspect gcc will assign the > high register, just based on how gcc internals work in this case.)
On a BE 32-bit machine, the "output register" technically ought to be "64-bit" anyways, since it's constrained to be the same as the 64-bit "input register". That means that you ought to make sure to set *both* output registers appropriately, one of them being 0 and the other being the 32-bit number. I think that's the only answer that actually makes any sense from a holistic code-generation sense. So it seems we are in violent agreement :-D.
Cheers, Kyle Moffett
| |