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SubjectRe: [PATCH] Blacklist DMAR on Intel G31/G33 chipsets
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On Fri, 2008-09-05 at 20:34 +0200, Ingo Molnar wrote:
> * David Woodhouse <dwmw2@infradead.org> wrote:
>
> > Some BIOSes (the Intel DG33BU, for example) wrongly claim to have DMAR
> > when they don't. Avoid the resulting crashes when it doesn't work as
> > expected.
> >
> > Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
> > ---
> >
> > This time, I build-tested it with CONFIG_DMAR actually enabled. Sorry.
> > I'd still be grateful if someone could test it on a DG33BU with the
> > old BIOS though, since I've killed mine. I tested the DMI version, but
> > not this one.
>
> ok - fixing this makes sense. I have two worries about this patch.
>
> Firstly, the quirk is keyed off an ACPI capability which is quite bad if
> someone boots with ACPI off. (which is still quite possible) The DMAR is
> PCI enumerated so there's nothing inherently ACPI about this. A DMI
> quirk (which will work even if ACPI is disabled) looks more robust.

No, the intel-iommu code is isn't PCI-enumerated -- it all depends on
that ACPI table, unfortunately. That's why we're have this problem in
the first place and why I'm left with a dead board; apparently they
still drag crack-smoking hobos in off the street to write BIOSes, and
we're trusting more and more of our system to this crap every day.

I'm perfectly happy to go back to my original DMI-based version though.
Here it is...

Subject: Blacklist DMAR on Intel G31/G33 chipsets

Some BIOSes (the Intel DG33BU, for example) wrongly claim to have DMAR
when they don't. Avoid the resulting crashes when it doesn't work as
expected.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>


diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 8d0e60a..c3edcdc 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -2348,11 +2348,34 @@ static void __init iommu_exit_mempool(void)

}

+static int blacklist_iommu(const struct dmi_system_id *id)
+{
+ printk(KERN_INFO "%s detected; disabling IOMMU\n",
+ id->ident);
+ dmar_disabled = 1;
+ return 0;
+}
+
+static struct dmi_system_id __initdata intel_iommu_dmi_table[] = {
+ { /* Some DG33BU BIOS revisions advertised non-existent VT-d */
+ .callback = blacklist_iommu,
+ .ident = "Intel DG33BU",
+ { DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"),
+ DMI_MATCH(DMI_BOARD_NAME, "DG33BU"),
+ }
+ },
+ { }
+};
+
+
void __init detect_intel_iommu(void)
{
if (swiotlb || no_iommu || iommu_detected || dmar_disabled)
return;
if (early_dmar_detect()) {
+ dmi_check_system(intel_iommu_dmi_table);
+ if (dmar_disabled)
+ return;
iommu_detected = 1;
}
}

--
David Woodhouse Open Source Technology Centre
David.Woodhouse@intel.com Intel Corporation





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