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SubjectRe: [RFC patch 0/4] TSC calibration improvements

On Thu, 4 Sep 2008, Ingo Molnar wrote:
> hm, unless i'm missing something i think here we still have a small
> window for an SMI or some virtualization delay to slip in and cause
> massive inaccuracy: if the delay happens _after_ the last
> pit_expect_msb() and _before_ the external get_cycles() call. Right?

Yes. I had the extra pit_expect_msb() originally, but decided that
basically a single-instruction race for somethign that ran without
any MSI for 15ms was a bit pointless.

But adding another pit_expect_msb() is certainly not wrong.

However, this one is:

> + /*
> + * The iteration assumes that expect never goes below zero:
> + */

No it doesn't. "expect" is unsigned char and will happily wrap, as will
the PIT timer. The fact that it is in "single shot" mode doesn't actually
mean that the timer stops, it just affects what happens when it goes down
to zero.

So that BUILD_BUG_ON() is misleading and incorrect.

Of course, it is true that in _practice_ you would never actually want to
delay that long, but the code as written should be perfectly happy to
iterate arbitrarily many times. Of course, the actual final TSC
multiply/divide calculations would overflow at some point, but that's much
further down the line.


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